ATMEYA Electrocrats
5.9K subscribers
8:13
ASIC Digital Design : Simulation & Synthesis of ALU | ASIC | VLSI | Digital Design
ATMEYA Electrocrats
374 views • 1 month ago
7:28
ASIC Digital Design : Simulation & Synthesis of ADDER | ASIC | VLSI | Digital Design
ATMEYA Electrocrats
220 views • 1 month ago
6:41
ASIC Digital Design : Simulation & Synthesis of SET RESET Flip-Flop(SR FF)| ASIC|VLSI|Digital|Design
ATMEYA Electrocrats
102 views • 1 month ago
6:37
ASIC Digital Design:Simulation & Synthesis of D FF(Delay or Data Flip-flop)|ASIC|VLSI|Digital Design
ATMEYA Electrocrats
42 views • 1 month ago
6:08
ASIC Digital Design : Simulation and Synthesis of Jack Kilby FF (JK FF)|ASIC | VLSI | Digital Design
ATMEYA Electrocrats
96 views • 1 month ago
5:01
ASIC Digital Design : Simulation and Synthesis of Toggle FF (T FF) | ASIC | VLSI | Digital Design
ATMEYA Electrocrats
67 views • 1 month ago
42:06
ASIC Analog Design : Schematic and Layout of Differential Amplifier | ASIC | VLSI | Analog Design
ATMEYA Electrocrats
205 views • 1 month ago
5:41
ASIC Analog Design - Parametric Analysis in Cadence | ASIC | VLSI | Analog Design
ATMEYA Electrocrats
154 views • 1 month ago
12:43
EXP3 Balance Modulator
ATMEYA Electrocrats
232 views • 4 months ago
10:49
Exp 4 Pre Emphasis De Emphasis
ATMEYA Electrocrats
423 views • 4 months ago
14:09
Expt1 Amplitude modulator New
ATMEYA Electrocrats
1.6K views • 4 months ago
16:06
Exp2 FM Using IC565
ATMEYA Electrocrats
683 views • 4 months ago
3:26
ALP to move a block of n bytes of data from source (2000h) to destination (2050h) using External RAM
ATMEYA Electrocrats
356 views • 4 months ago
3:59
ALP to exchange the source block , containing n (06) bytes of data with destination block
ATMEYA Electrocrats
88 views • 4 months ago
3:52
ALP To exchange the source block starting with address N (05) bytes of data with destination block
ATMEYA Electrocrats
186 views • 4 months ago
5:03
ALP to move a block of n bytes of data from source (20h) to destination (40h) using Internal-RAM
ATMEYA Electrocrats
550 views • 4 months ago
17:43
ASIC Analog Design - Lab 4: OPERATIONAL AMPLIFIER (Op - Amp) | CADENCE Tool
ATMEYA Electrocrats
210 views • 4 months ago
21:20
ASIC Analog Design - Lab 3: COMMON SOURCE AMPLIFIER | CADENCE Tool
ATMEYA Electrocrats
248 views • 4 months ago
3:40
ASIC Analog Design - Lab 2: DELAY CALCULATION for NAND Gate Parametric | CADENCE Tool
ATMEYA Electrocrats
168 views • 4 months ago
10:19
ASIC Analog Design - Lab 1: Schematic and Layout of CMOS Inverter | ASIC | VLSI | Analog Design
ATMEYA Electrocrats
334 views • 4 months ago
10:48
Expt. No. 2b: BJT Crystal Oscillator || ADSD Lab ||BECL305
ATMEYA Electrocrats
552 views • 8 months ago
13:58
Expt. No. 2a: BJT Colpitts Oscillator || ADSD Lab || BECL305
ATMEYA Electrocrats
426 views • 8 months ago
3:18
Expt. No. 10a: Monostable Multivibrator using 555 timer || ADSD Lab ||BECL305
ATMEYA Electrocrats
82 views • 8 months ago
8:39
Expt. No. 10b: Astable Multivibrator using 555 timer || ADSD Lab ||BECL305
ATMEYA Electrocrats
118 views • 8 months ago
3:16
Expt. No. 3a: Adder Circuit using Opamp ||ADSD Lab || BECL305
ATMEYA Electrocrats
320 views • 8 months ago
2:21
Expt. No. 3b: Integrator Circuit using Opamp||ADSD Lab ||BECL305
ATMEYA Electrocrats
305 views • 8 months ago
2:39
Expt. No. 3c: Differentiator Circuit using Opamp || ADSD Lab ||BECL305
ATMEYA Electrocrats
546 views • 8 months ago
10:03
Expt. No. 1: BJT CE voltage amplifier with and without feedback || ADSD Lab ||BECL305
ATMEYA Electrocrats
957 views • 8 months ago
20:56
EXPT NO.7B: Program for a HLDC frame to perform the Character stuffing
ATMEYA Electrocrats
185 views • 10 months ago
12:50
Verification of Thevenin's Theorem | circuits and controls Lab
ATMEYA Electrocrats
1.2K views • 1 year ago
Load More