Counters (Part 6) - Counters as State Machines
Olawale Akinwale Olawale Akinwale
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 Published On Aug 21, 2021

In this video, the synchronous counter is defined as a finite state machine in VHDL.

Resources that you might find useful:
The Intel Manual for the DE10-Lite Board: https://www.intel.com/content/dam/www...

The Terasic files that include the DE10-Lite Board's manual and a control panel for interacting with the board without writing a line of code, and a tool for generating a qsf file for your projects: https://www.terasic.com.tw/cgi-bin/pa...

Intel's courses and laboratory exercises for the DE10-Lite Board (and others): https://software.intel.com/content/ww...

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